1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device and a semiconductor wafer.
2. Description of the Related Art
In recent years, copper wiring has been utilized as a wiring material of a semiconductor device for achieving fine wiring. Japanese Patent Laid-Open No. 2006-093402 discloses a configuration of an end portion of a wafer forming a semiconductor device in a method for manufacturing a semiconductor device having copper wiring. Specifically, it is disclosed that a metal, copper herein, which is a conductor of wiring is formed on a circumference of a wafer rather than an insulation film on which wiring is formed, and a block layer is formed thereon. However, when etching the insulation film in a method for manufacturing wiring as in Japanese Patent Laid-Open No. 2006-093402, an insulator may be sometimes etched in a portion of an outer edge of a wafer where copper is formed. When the insulation film of the portion where copper is formed is removed, the copper may scatter to the wafer to cause metal contamination. Such metal contamination may occur in a semiconductor device having a wiring layer and undergoes a process of collectively removing a plurality of insulation films.
Accordingly, the present invention provides a method for manufacturing a semiconductor device capable of suppressing metal contamination. The present invention also provides a semiconductor wafer in which metal contamination is suppressed.